Semiconductor devices are commonly found in modern electronic products. Semiconductor devices vary in the number and density of electrical components. Discrete semiconductor devices generally contain one type of electrical component, e.g., light emitting diode (LED), small signal transistor, resistor, capacitor, inductor, and power metal oxide semiconductor field effect transistor (MOSFET). Integrated semiconductor devices typically contain hundreds to millions of electrical components. Examples of integrated semiconductor devices include microcontrollers, microprocessors, charged-coupled devices (CCDs), solar cells, and digital micro-mirror devices (DMDs).
Semiconductor devices perform a wide range of functions such as signal processing, high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, transforming sunlight to electricity, and creating visual projections for television displays. Semiconductor devices are found in the fields of entertainment, communications, power conversion, networks, computers, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment.
Semiconductor devices exploit the electrical properties of semiconductor materials. The atomic structure of semiconductor material allows the material's electrical conductivity to be manipulated by the application of an electric field or base current or through the process of doping. Doping introduces impurities into the semiconductor material to manipulate and control the conductivity of the semiconductor device.
A semiconductor device includes active and passive electrical structures. Active structures, including bipolar and field effect transistors, control the flow of electrical current. By varying levels of doping and application of an electric field or base current, the transistor either promotes or restricts the flow of electrical current. Passive structures, including resistors, capacitors, and inductors, create a relationship between voltage and current necessary to perform a variety of electrical functions. The passive and active structures are electrically connected to form circuits, which enable the semiconductor device to perform high-speed calculations and other useful functions.
Semiconductor devices are generally manufactured using two complex manufacturing processes, i.e., front-end manufacturing, and back-end manufacturing, each involving potentially hundreds of steps. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each semiconductor die is typically identical and includes circuits formed by electrically connecting active and passive components. Back-end manufacturing involves singulating individual semiconductor die from the finished wafer and packaging the die to provide structural support and environmental isolation. The term “semiconductor die” as used herein refers to both the singular and plural form of the words, and accordingly can refer to both a single semiconductor device and multiple semiconductor devices.
One goal of semiconductor manufacturing is to produce smaller semiconductor devices. Smaller devices typically consume less power, have higher performance, and can be produced more efficiently. In addition, smaller semiconductor devices have a smaller footprint, which is desirable for smaller end products. A smaller semiconductor die size can be achieved by improvements in the front-end process resulting in semiconductor die with smaller, higher density active and passive components. Back-end processes may result in semiconductor device packages with a smaller footprint by improvements in electrical interconnection and packaging materials.
In a fan-out wafer level chip scale package (Fo-WLCSP), an encapsulant is formed around a semiconductor die and a build-up interconnect structure is formed over the encapsulant and semiconductor die for electrical interconnect. A build-up interconnect structures with multiple redistribution layers (RDLs), e.g., three or more RDLs, is particularly susceptible to warpage. Warpage of the build-up interconnect structure can cause joint defects or failures, which reduce the reliability of the electrical connections across the Fo-WLCSP. Defects in a build-up interconnect structure lead to lower manufacturing yield and higher cost. Additionally, formation of a multilayer build-up interconnect structure including RDLs with narrow pitch and fine line spacing involves complex, expensive, and time-consuming manufacturing steps. Limiting the number of layers with narrow pitch and fine line spacing within a build-up interconnect structure can decrease manufacturing costs and reduce the potential for defects and warpage. However, forming less RDLs also reduces the number of possible interconnections and the input/output (I/O) count of the device. Additionally, a reduced number of RDLs within a build-up interconnect structure, e.g., two or less RDLs, eliminates the option of incorporating a ground plane into one of the layers.
The electrical interconnection between devices in a semiconductor package and external devices can also be accomplished by embedding a substrate containing conductive through silicon vias (TSV) or through hole vias (THV) within the semiconductor package. However, forming embedded substrates with narrow pitch and fine line spacing, e.g., less than or equal to 20 μm, is expensive and often times produces defects in the substrate, which lower manufacturing yield and increase cost. Additionally, embedded substrates experience routing difficulty when incorporating higher density semiconductor devices, e.g., semiconductor devices with a pad pitch of less than or equal to 50 μm or an array pad design. The increased pitch and wider line spacing within embedded substrates necessitates the formation of more conductive layers within the substrate to achieve the desired electrical performance. Additional conductive layers within the substrate increase overall manufacturing time and cost.